Flip flop rtl con transistores y resistencias Discrete Flip Flop

 

Discrete Flip Flop

In some bored time I felt like drawing some schematics to tubify (or considering I'm probably not going to build it, it would be better to say "represent as a tube circuit ;) my induction heater, everything from the PWM driver (an IC) to the closed-loop control (more ICs!). All-in-all I might do it in 20 or 30 tubes total, which isn't that bad considering how many transistors the SS design has (probably in the range of 200). But that's not what I've brought you today. The driver chip, the SG3524, outputs an alternating pulse for driving a push-pull class D output, but uses a single clock generator to do it. What's used is a divide-by-two counter.

Flip-Flops

So I looked up "toggle flip flop" in a reference book and it consists of a type-D flip-flop, with D set by Q' (the NOT Q output). The D F/F itself consists of two clocked RS flip-flops cascaded, so that, when the clock is high, the first (master) F/F is set to the value at D. When CLK goes low, that register is disabled (by a pair of AND gates) and remains in its set state, while its state is transferred to the second (slave) flip-flop, which gives the value at the output.

Type D Flip-Flop

Logic diagram of the type D flip-flop. To set a definite state from just one input, the input (D) is inverted and sent to the complementary input.

Since it takes one half a clock cycle to set the input and the other half to set the output, the input and output are disconnected from each other at all times. Thus, the output can be connected to the input with no upsetting and ugly effects, like pulses or oscillation. With D connected to Q' (which is the clock-delayed inversion of the previous value of D), the state switches exactly every time the clock falls (and sets the slave register). Since the state is switching, or rather I should say toggling, with every clock fall, you can see the frequency has been exactly halved.

Transistors

RS Flip Flop

Now let's break it down for discrete parts. This is an RS flip-flop built in "MML" NOR (NOT-OR) gates. (I don't know if the term "MML" is used anywhere else but The Art of Electronics: there it means "Mickey-Mouse Logic", using cutesey transistors and resistors to make a half-assed logic circuit. In reality this is called RTL, Resistor Transistor Logic, and was popular in the 60s and 70s, when transistors were more plentiful than ICs. TTL (74xx, then 74LSxx and etc.) and CMOS (4xxx, now 4xxxB) surpassed it, leaving it obsolete, not that that bothers me any!)

In the above circuit, when power is applied, it's in an indefinite state. If one of the resistors or transistors is more conductive, that one will tend to turn on. You can see by inspection that, when say the inside left transistor (Q) is on, its collector voltage is low, which means the right transistor's base is low and thus off, which means its collector (Q') is high, which keeps the left transistor turned on. Being a symmetrical circuit, the opposite condition is also stable. Two stable states is called bistable, as you might've guessed.

To make use of this latching property, we add another pair of transistors, in this case in parallel, with seperate bases. (You could go cascode, and that works fine for transistors, but tubes run out of breath easily so I'd rather stick with paralleling (which results in a NOR gate) rather than cascoding (which results in a NAND gate).) Say the Q transistor is on. Then, Q' is high and Q is low. If S is set HIGH, Q' is pulled down, stopping the base current to transistor Q, turning it off and causing the point Q to rise HIGH. This turns on the Q' transistor, which continues to hold Q' LOW, whether or not S is high. Thus, you can set the state with a narrow pulse, and it will remember the event until R is conversely strobed HIGH, putting it in the opposite state.
(Instead of the SCRs shown on the oscillator schematic on induction heater part 6, I'll use one of these, with a pulsed reset switch so in case of continued fault, the circuit can reset itself within microseconds rather than be forced into a dangerous operating-under-fault condition.)

And thus am I brought, finally, to the subject I wanted to dive into to begin with: the complete type D flip-flop, in discrete circuitry. Since I want a type T (Toggle) flip-flop, I'll couple the output to the input, which since I have Q and Q' outputs and D and D' inputs, I can remove that pesky inverter. Since I want Q' on D, I also need Q on D', so I'll need a crossover connection. This is shown at the bottom of the following schematic. Of course, I make up for that by buffering the clock input with an inverter, but that's for convienience (trimming the waveform to fit the specs of the circuit) and a throwback to the tube circuit, which uses dual triodes that have more bang for their buck, so you might as well use both.

Discrete type T Flip-Flop

This is the second most beautiful circuit I've ever drawn. I just had to write a page and F/F tutorial for it, it's so nice. It has four-fold, rotational and local symmetries. It's elegant. Every segment connects to the next in some way, yet it works perfectly and logically. I especially like the layout, compared to a standard linear form (as at the top of this page). If it had more than four sections, I'd happily draw wild angles to push it into a polygonal, rather than rectangular, pattern.
One caveat: note the output terminals P1 and P2. These are after the diode AND gates. Ordinarily, such a "quadrature generator" would take the clock and AND it with the divided output in four combinations, producing a 1/4 width pulse that cascades from Q1...Q4 (changing on every clock transition). (Here I am taking two outputs 180° out of phase, Q1 and Q3 or Q2 and Q4 respectively.) But since I already have AND gates inside this thing, I can just tap the signal after one for the desired output!


And....*drumroll*....The Greatest Circuit I have ever drawn. It is so great, I have set it for wallpaper.

Tube Flip Flop...hallowed ground

I shan't dare write values on this, but you're welcome to figure out appropriate tube types, plate resistor, level-shifting and grid-leak resistor values for this schematic. I'd recommend +/-100V regulated for supply, and using 12AU7s that'll probably give around 5-10mA per triode in the ON state. Using small plate resistors to restrict gain, Miller capacitance should be minimal and transit times should be on the order of a microsecond or better. I would Love to see this circuit constructed with pentodes, not only for the switching devices but also for constant current sources to replace the grid leak resistors. Transit times better than 0.1μs should be attainable. Not bad for tubes!

Incidentially, I drew this with no prior knowledge of how digital systems were constructed in the vacuum tube days. If you know the topology and wiring or have circuits of digital tube systems I'd be glad to have a look, e-mail me.

Live Model

. . .

. . .Oh, um, still around? I suppose you want to see one of these things working... wellll... I can't very well breadboard nine tubes at the moment, especially without a bipolar 100V supply, but I can at least build the transistor circuit, owing to the fact that I bought a packet of 2N4401's recently.

Breadboarded Circuit

Breadboarded Circuit. I used 330 ohm collector resistors, 2.2k base-supply resistors and 680 ohm base-turn-off resistors. Since through some sick twist of fate I have no more 1N4148 / 1N914 diodes, I had to use 1N4001's mostly. There are a few highspeed diodes in there, just to muddle the waters. It still switches fine, but rise time suffers.

Waveform

Waveform at audio frequency. Channels are P1 and P2 respectively (try to guess which ones! I think you'll be pleasantly suprized it's impossible to TELL! HA HA!!!!HA!!!! ahem.) Voltage supply is +6V regulated, vertical scale 2V/div. I think the off state is a volt or two above ground (the top and bottom traces are centered on a div above center and a div above bottom respectively).

HF Waveform

High speed, I forget what timebase, possibly 2μs/div. This is with about 75% duty cycle on the clock. You can see capacitive coupling of state transitions shooting through, and risetime is noticable. Fall time appears to be healthy though, probably 100-200ns. 1N4148s would definetly help, and smaller base-turn-off resistors might help (in a circuit like this I'd usually go for 330 ohms or so, instead of 680), as well as speed-up capacitors across the base-dropping resistors (to cancel storage charge).


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Oscar perez

Arquitecto especialista en gestion de proyectos si necesitas desarrollar algun proyecto en Bogota contactame en el 3006825874 o visita mi pagina en www.arquitectobogota.tk

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